Che-Ming (Jerry) Chang
Che-Ming (Jerry) Chang

I am a Ph.D. student affiliated with the Southern California Computer-Aided Design Lab (SCCAD), advised by Prof. Sung Kyu Lim. I received my B.S. in Electrical Engineering from National Taiwan University in June 2024 and previously interned at IBM Research and Qualcomm.

My research focuses on applying AI to electronic design automation (EDA), with an emphasis on physical design, validated on not only academic benchmarks but also industrial flows. I have run end-to-end synthesis-to-signoff using Synopsys VCS, Design Compiler, PrimeTime, and Library Compiler, and Cadence Innovus.

Outside of research, I enjoy working out, playing volleyball, and playing the piano.

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Education

University of Southern California
Ph.D. student, Electrical and Computer Engineering · GPA 4.0 / 4.0
National Taiwan University
B.S. in Electrical Engineering · GPA 4.17 / 4.3

Publications

2027

  1. RouteFormer: Learning-Based Incremental Timing-Driven Global Routing
    Che-Ming Chang, Rongjian Liang, Haoyu Yang, Pin-Han Chen and Sung Kyu Lim
    36th ACM International Symposium on Physical Design (ISPD), 2027
  2. Physical Design Algorithms for Logic Folding and Fine-Grained Logic-on-Logic 3D ICs
    Che-Ming Chang, Sung Kyu Lim
    32nd IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC), 2027
  3. Encoding Symmetries into Operator Learning: Towards Accurate Multi-Physics Simulation in Advanced Packaging
    Che-Ming Chang, Shao-Yu Lo, Yao-Wen Chang, Sung Kyu Lim
    32nd IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC), 2027

2026

  1. WAFER: Warpage Analysis via Fourier-Enhanced Residual Calibration for Large-Scale 2.5D IC Designs
    Pin-Han Chen, Chanhee Yang, Sungchul Joo, Hyungsoo Moon, Che-Ming Chang, Taek-Soo Kim, Sung Kyu Lim
    45th IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2026
  2. CODMAS: A Dialectic Multi-Agent Collaborative Framework for Structured RTL Optimization
    Che-Ming Chang, Prashanth Vijayaraghavan, Ashutosh Jadhav, Charles Mackin, Hsinyu Tsai, Vandana Mukherjee, Ehsan Degan
    19th Conference of the European Chapter of the Association for Computational Linguistics (EACL, Industry Track), 2026

2025

  1. Advanced Packaging Warpage Modeling with DeepONet-Based Operator Learning
    Shao-Yu Lo, Che-Ming Chang, Yao-Wen Chang
    44th IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2025
  2. Quantum Circuit Compilation for Trapped-Ion Processors With the Drive-Through Architecture
    Che-Ming Chang, Jie-Hong Roland Jiang, Dah-Wei Chiou, Ting Hsu, Guin-Dar Lin
    IEEE Transactions on Quantum Engineering (TQE), 2025
  3. Mixed-Size Placement Prototyping Based on Reinforcement Learning with Semi-Concurrent Optimization
    Cheng-Yu Chiang, Yi-Hsien Chiang, Chao-Chi Lan, Yang Hsu, Che-Ming Chang, Shao-Chi Huang, Sheng-Hua Wang, Yao-Wen Chang, Hung-Ming Chen
    30th IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC), 2025

Experience

Research Intern, Methodology team
Qualcomm, San Diego, CA · May 2026 – Aug 2026
  • Developed an analytical, timing-aware Vt assignment methodology for ECO power optimization.
  • Improved TNS recovery by up to 36%, and full-flow ECO runtime by up to 26% on SoC-scale production designs while maintaining comparable timing and power QoR, enabling faster turnaround for production tapeouts.
Graduate Research Assistant, Southern California Computer-Aided Design Lab
University of Southern California, Los Angeles, CA · Sep 2025 – Present
  • Researched in ML-based global routing refinement framework.
  • Researched in floorplanning and pin assignment for 3D IC designs.
Undergraduate Research Assistant, Electronic Design Automation Lab
National Taiwan University, Taipei, Taiwan · Aug 2023 – Jan 2025
  • Assisted in reinforcement learning for concurrent macro placement project.
  • Researched in DeepONet-based operator learning framework for warpage prediction in advanced packaging designs.
Undergraduate Research Assistant, Applied Logic and Computation Lab
National Taiwan University, Taipei, Taiwan · Sep 2022 – Jun 2024
  • Researched in qubit mapping for trapped-ion processors.
Research Intern, AI for EDA Group
IBM Research, San Jose, CA · Jun 2024 – Sep 2024
  • Researched in agentic LLM framework for RTL code optimization.
Hardware Product Sprint
Google, New Taipei City, Taiwan · Jun 2023 – Sep 2023
  • Developed Translingo, a transparent display translation device with real-time gesture and speech recognition on a Raspberry Pi.

Honors & Scholarships